Dynamic Warpage Mitigation Strategies in High Density Laminate Package Assemblies
Balancing copper density, selecting ultra-low expansion glass cores, and profiling post-mold curing prevents dynamic warpage in high density laminate assemblies.
Ajinomoto Build up Film
Meaning
Insulating resin sheets with a micro-thin release carrier provide the primary dielectric layers between copper circuitry in high-density build-up substrates. The application of ajinomoto build up film enables the sequential lamination process used to build multi-layer central processing unit substrates. It stops applying when the design shifts to traditional glass-reinforced prepreg laminates that cannot support sub-ten-micron via diameters.
Material Composition
Epoxy resins loaded with silica nanoparticles determine the thermal expansion and electrical isolation properties of these dielectric layers. Adjusting the ratio of silica filler to polymer matrix affects the viscosity during hot-press lamination. When the formulation has too little silica, excessive resin flow occurs during the vacuum lamination step.
Build Cycle
Vacuum press lamination followed by a thermal bake establishes the solid-state structural integrity of each circuit layer. Lamination trials on prototype lines must establish the temperature profile that allows the resin to fill micro-vias without leaving internal voids. Rushing the process before verifying void-free filling leads to interlayer delamination during subsequent solder reflow testing.
When operators proceed to full volume run-rates with unoptimized parameters, the micro-voids act as moisture traps that rupture under thermal stress.
Production Defect
Surface micro-cracking and blister formation represent the common yield-limiting issues when processing thin dielectric films. Inadequate cure cycles leave unreacted epoxide groups that lower the glass transition temperature. This condition decreases the adhesion strength of the sputtered seed layer, causing the copper lines to lift during high-temperature baking.