Meaning
Processor affinity configuration assigns specific software threads to dedicated central processing unit cores that share the same local physical memory controller to prevent remote memory access latency. Hardware system administrators use numa core pinning to maximize CPU cache efficiency and memory throughput on multi-socket servers. This setup separates critical execution tasks from high-overhead context switching and cache invalidation processes.
Throughput Effect
Thread migration between sockets causes severe cache misses and memory bus saturation. Pinning guarantees that data access remains local to the nearest memory socket. This localization keeps memory latency to a minimum.
Architectural Context
Non-uniform memory access architectures group processor cores and memory controllers into local nodes connected by a system interconnect. When a thread runs on a core in node zero but accesses memory allocated in node one, the transaction must traverse the interconnect, adding latency. Pinning the thread to node zero ensures all memory allocation and execution happen locally.
This step avoids the inter-socket routing that slows down memory-intensive tasks.
Configuration Task
System engineers write custom scripts or use taskset commands to enforce affinity masks on application launch. Orchestration tools apply these rules automatically to run-time containers to protect high-performance databases. Continuous lock monitoring verifies that pinned threads do not compete with kernel tasks.
